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Writing A C Makefile

By Bryan Young
Expert Author
Article Date: 2010-12-30

There are a few things that you as a programmer can do to simplify your coding experience. You can use an integrated development environment (IDE). There are several free IDEs out there that do a surprisingly good job consolidating all the aspects of coding and simplifying them to the point of brain-numbing monotony. That's not the way I like to code. I prefer to do my coding in vim, plain and simple. So when it comes to managing a large programming project, I need a way to make sure that all of my files are up to date when I compile. I accomplish this through the use of a Makefile.

A Makefile is basically just a list of commands that are called when the make command is called. The difference being that through the use of various flags, you can set up dependencies and only compile the sources that need to be compiled, which is a huge time-saver when it comes to compiling large programs. Setting up those dependencies is a relatively simple task, but one that will make your coding experience a much happier one. A basic Makefile will look like this.


#Makefile

myprogram.exe : main.o class.o
gcc -o myprogram.exe main.o class.o

main.o : main.c
gcc -c main.c

class.o : class.h class.c
gcc -c class.c


The : separates dependent files on the left from dependencies on the right. When make is run, it checks to see if the files on the right have been updated more recently than the file on the left. If so, then the command listed under the dependency line is run.

It is important to note that make is essentially recursive, in that when the command is run it looks to the first line and sees main.o class.o as dependencies. It then runs make on each of these to see if they need to be updated before returning to the first line and deciding whether or not to link the program. That is why the main program dependencies are listed first.

About the Author:
Bryan Young is a staff writer for WebProNews.



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